Senior NVM Circuit Designer
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Senior NVM Circuit Designer
120,000–225,000 / Year
Location
Palo Alto, CA • Austin, TX • Remote
Experience
Senior
Posted
Jul 10, 2026
Apply by
August 9, 2026
Applicants
0
Early applicantEasy applyFull-timeHybrid
Job Description
Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications—whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.
We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.
Location: Palo Alto, CA or Austin, TX
### Here's what you will do
- Participate in design and responsible for verifying complete IP macros specifically applicable for Mythic product architecture utilizing the available licensed NVM technologies from foundries
- Involve in NVM architecture for optimum performance and area of Analog Compute Engine
- Design and verify the new circuits to handshake with the analog computation and the digital controlling blocks
- Design, optimize and verify the NVM circuits and functional blocks (including and not limited to high voltage generator block, x-path, y-path, test and peripheral circuits) at the full chip level
- Responsible for NVM full chip circuit simulation setup, debugging, and verification
- Responsible for RNM and functional model of NVM circuits for verification
- Participate in RNM and functional model of NVM circuits for computational software
- Work closely with the validation engineers to expedite the silicon evaluation process and backend teams for the production qualification releases
### Here's the background we hope you will have
- Hands-on experience in NVM embedded or NVM product design, verification and production
- Hands-on experience in NVM full chip circuit simulation setup, debugging, and verification
- Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling
- Familiar and hands-on experience some or all memory circuit block design: decoder, high voltage switches, charge pumps, HV and LV regulator, bandgap, high performance low power sense amp, monitoring, and BIST capability
- Good understanding & knowledge of semiconductor device physics, and advanced process technology
- Experienced in multiple generations NVM tapeout activities, layout supervision, chip planning, silicon debugging
- Excellent communication skills, ability to work well across multi-functional teams
- Fluent in all major CAD tools: SPICE, Cadence Virtuoso, Verilog simulation software
- Some knowledge of scripting such as Python
- Must be a self-starter, detail-oriented, and team player
- Ph.D. or MS degree in EE or related 5-10+ years of semiconductor memory industrial experience
### The following would be nice to have, but is not required
- Experience working at fluid fast-paced startups
- Experience in process integration, semiconductor reliability and product qualification of NVM technology
- Experience in Semiconductor Emerging Non-volatile Memory Technologies such as RRAM, MRAM and others
- Experience in cross-functional team development with a multi-technology foundry environment
At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.
At Mythic, we pride ourselves in creating a culture where all employees feel valued and appreciated for the diverse perspectives and backgrounds they bring to the team. We aim to hire smart people, give them the resources they need to do their job well, and then leave the rest up to them. We celebrate individual differences and encourage people to be comfortable bringing their authentic selves to work. At the end of the day, we are committed to building a diverse workforce where everyone belongs.
Mythic is an equal opportunity and affirmative action employer. It ensures equal employment opportunity without discrimination or harassment based on race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity or expression, age, disability, national origin, marital or domestic/civil partnership status, genetic information, citizenship status, veteran status, or any other characteristic protected by law.
We look forward to reviewing your application!
Key Responsibilities
- Design and verify complete IP macros for Mythic product architecture using licensed NVM technologies.
- Involve in NVM architecture for optimum performance and area of Analog Compute Engine.
- Design and verify new circuits to handshake with analog computation and digital controlling blocks.
- Design, optimize, and verify NVM circuits and functional blocks at the full chip level.
- Manage NVM full chip circuit simulation setup, debugging, and verification.
- Develop RNM and functional models of NVM circuits for verification.
- Collaborate with validation engineers to expedite silicon evaluation and production qualification.
Requirements
- Ph.D. or MS degree in EE or related field
Skills Required
NVM embedded designNVM product designNVM verificationFull chip circuit simulationPythonVerilog-ASystem VerilogReal Number ModelingMemory circuit block designSemiconductor device physicsProcess technologyTapeout activitiesLayout supervisionChip planningSilicon debuggingSPICECadence VirtuosoVerilog simulation softwareCommunicationSelf-starterDetail-orientedTeam playerProcess integrationSemiconductor reliabilityProduct qualificationRRAMMRAMFoundry environment experience
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