Senior Principal Hardware Applications Engineer
Back to Jobs
BrightvisionGet Smart Job AI Coach in the appFree on iOS and Android

Senior Principal Hardware Applications Engineer
199,800–266,400 / Year
Location
Santa Clara, CA
Experience
Senior
Posted
Jul 30, 2026
Apply by
August 29, 2026
Applicants
0
Early applicantEasy applyFull-timeWork from Office
Job Description
Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their operations. We leverage cutting-edge technologies to create scalable, secure, and user-friendly applications. As we continue to grow, we’re looking for a skilled Senior Principal Engineer, Hardware Application Engineering –Signal Integrity & Power Integrity to join our dynamic team and contribute to our mission of transforming business processes through technology.
This is a fantastic opportunity to join an established and well-respected organization offering tremendous career growth potential.
Job Title: Senior Principal Engineer, Hardware Application Engineering – Signal Integrity & Power Integrity
Location: Santa Clara, CA
100% Onsite
Salary: USD $1,99,800 – $2,66,400 / yr
Key Responsibilities
- Lead SI/PI engineering activities for high-speed Ethernet switch and AI infrastructure platforms.
- Define high-speed layout, routing, stack-up, and design guidelines for SerDes channels, power delivery networks, and sensitive interfaces.
- Perform channel modeling, post-layout extraction, simulation, and analysis to identify and resolve design issues.
- Conduct SI/PI design reviews and provide recommendations to improve performance and design margins.
- Perform and review PDN simulations, including impedance, IR drop, decoupling, transient response, and voltage droop.
- Support high-speed SerDes technologies, including 112G and 224G PAM4, and contribute to future 448G platform development.
- Lead compliance testing, lab characterization, and hardware debugging using tools such as VNAs, BERTs, oscilloscopes, TDRs, and jitter analyzers.
- Provide SerDes tuning and design guidance based on simulation results, lab measurements, and field data.
- Work closely with customers, ODMs, silicon teams, hardware engineers, software teams, and operations teams.
- Support reference design development, customer platform bring-up, qualification, and production ramp.
- Develop and deliver SI/PI training for customers, ODM partners, and internal engineering teams.
- Mentor engineers and provide technical leadership across strategic customer programs.
- Contribute SI/PI expertise to future product architecture and technology roadmap discussions.
- Travel to customer sites, ODM locations, and labs as needed.
Required Qualifications
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related field.
- 15+ years of experience in high-speed hardware design, development, or validation.
- 10+ years of hands-on Signal Integrity (SI) and Power Integrity (PI) experience with high-speed SerDes platforms.
- Strong knowledge of 25G NRZ, 112G, and 224G PAM4 technologies.
- Experience with SI/PI channel modeling, PCB layout, stack-up design, simulation, compliance testing, and SerDes tuning.
- Strong understanding of PDN analysis, including impedance, IR drop, decoupling, transient response, and voltage droop.
- Experience with SI/PI tools such as Ansys HFSS/SIwave, Cadence Sigrity/Clarity/PowerSI, or similar tools.
- Hands-on experience with high-speed lab and test equipment, including VNAs, BERTs, oscilloscopes, TDRs, and jitter analyzers.
- Strong customer-facing, technical leadership, communication, and problem-solving skills.
- Experience providing technical guidance or training to engineering teams.
Would you like to know more about this opportunity? For immediate consideration, please send your resume to [\[email protected\]](/cdn-cgi/l/email-protection) or contact us at (908) 650-6382
Bright Vision Technologies, we are committed to equal employment opportunities and fostering an inclusive work environment. If you require accommodations during the recruitment process, please let us know.
Position offered by “No Fee agency.”
Equal Employment Opportunity (EEO) Statement
Bright Vision Technologies (BV Teck) is committed to equal employment opportunity (EEO) for all employees and applicants without regard to race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, genetic information, disability, veteran status, or any other protected status as defined by applicable federal, state, or local laws. This commitment extends to all aspects of employment, including recruitment, hiring, training, compensation, promotion, transfer, leaves of absence, termination, layoffs, and recall.
BV Teck expressly prohibits any form of workplace harassment or discrimination. Any improper interference with employees' ability to perform their job duties may result in disciplinary action up to and including termination of employment.
Key Responsibilities
- Lead SI/PI engineering activities for high-speed Ethernet switch and AI infrastructure platforms.
- Define high-speed layout, routing, stack-up, and design guidelines for SerDes channels and power delivery networks.
- Perform channel modeling, post-layout extraction, simulation, and analysis to identify and resolve design issues.
- Conduct SI/PI design reviews and provide recommendations to improve performance and design margins.
- Perform and review PDN simulations, including impedance, IR drop, decoupling, transient response, and voltage droop.
- Support high-speed SerDes technologies, including 112G and 224G PAM4, and contribute to future 448G platform development.
- Lead compliance testing, lab characterization, and hardware debugging using tools such as VNAs, BERTs, oscilloscopes, TDRs, and jitter analyzers.
- Provide SerDes tuning and design guidance based on simulation results, lab measurements, and field data.
- Work closely with customers, ODMs, silicon teams, hardware engineers, software teams, and operations teams.
- Support reference design development, customer platform bring-up, qualification, and production ramp.
- Develop and deliver SI/PI training for customers, ODM partners, and internal engineering teams.
- Mentor engineers and provide technical leadership across strategic customer programs.
- Contribute SI/PI expertise to future product architecture and technology roadmap discussions.
- Travel to customer sites, ODM locations, and labs as needed.
Requirements
- Bachelor’s
- Master’s
- or PhD in Electrical Engineering
- Computer Engineering
- or a related field
Skills Required
Signal Integrity (SI)Power Integrity (PI)High-speed SerDes25G NRZ112G PAM4224G PAM4PDN analysisImpedance analysisIR drop analysisDecoupling analysisTransient response analysisVoltage droop analysisPCB layoutStack-up designChannel modelingPost-layout extractionSimulationCompliance testingAnsys HFSSAnsys SIwaveCadence SigrityCadence ClarityCadence PowerSIVNABERTOscilloscopeTDRJitter analyzerCustomer-facing skillsTechnical leadershipCommunicationProblem-solvingMentoring
App exclusive · Free
Smart Job AI Coach
Your personal interview coach on every job — readiness tips, profile improvements, and role-specific prep. Available only in the Pulse Job app.
Interview readiness
See how prepared you are and what to improve for each role.
Personalized tips
Actionable suggestions based on your profile and the job.
After you apply
Keep coaching momentum from job detail through application success.